Why MRAM? Why Now?
The energy cost of moving data in and out of solid-state memory dominates that of computation. While this has been known for many years at a chip level where the CPU shares the same piece of silicon as the SRAM cache, it has now been shown to be the most significant portion of total system energy use where the data movement involves transactions with the system’s DRAM. The startling result that greater than 60% of system energy is used in this way is a call to action.
As bad luck would have it, this realization is happening precisely at the same time as we approach a looming SRAM catastrophe. While SRAM has been the workhorse of cache memory on the compute chip, it is now scaling at a much reduced rate in the advanced CMOS technologies. In addition, all the techniques to reduce leakage current through the SRAM at both transistor and chip level are close to being exhausted.
The semiconductor industry is not far off from the situation where no more cache memory can be placed with the compute cores on the same chip. This means that the likelihood of DRAM transactions will increase with a dramatic rise in system energy.